Modern ASIC designs are becoming more complex, making verification job more important for each block (IP, CPU, memory...) added into the system. Verification process must be carefully planned and executed for reaching the goal of a bug-free RTL before ASIC production is started.

During SoC or ASIC project lifecycle FPGA based prototyping provides complete solution for design verification and validation. Based on latest FPGA devices ASIC prototyping offers design engineers unprecedented speed and flexibility to validate algorithm performance and verify implementation of hardware IP blocks. Additionally, ASIC prototyping with FPGA can assist in hardware/software co-verification cycle, providing possibility to software developers for real-time testing before real ASIC is produced. In this way ASIC prototyping with FPGA is dramatically reducing the verification time and increases the confidence for achieving the goal of first-time success with silicon production.

Beside traditional verification methods RT-RK offers real time verification on a market available platform or custom created one that can fulfill all customer requirements. Heavily trained and experienced team is here to ensure quality of custom solution.

During past few years our FPGA prototyping team has been involved in prototyping of newest generation of ASIC solution for digital television on modern multi-FPGA platforms. Our highly trained team has gathered valuable experience with many design techniques for design partitioning, thus providing us to easily pick the best order to optimize design for locality, which in result is minimizing the length and amount of inter-FPGA routing giving the highest possible performance of our ASIC prototyping solution.