Design Verification Service

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RT-RK can offer RTL verification as event-driven simulation using our unique verification approach which is not depending from used RTL simulation tool chain. Our verification environment can be run with any of today’s most capable EDA verification tools as Cadence’s Incisive Verification Environment, Synopsys Discovery Verification Platform or ModelSim from Mentor Graphics.

Starting from defined verification plan we can develop verification environment including test vectors, test benches and verification modules, create fully regression environment using any of scripting languages, debug RTL based verification item list and generate all various reports depending on customer requirements. Moreover, our highly experienced verification team is actively taking part in verification plan development with suggestions for improving verification process for targeted application.

TestRT-RK RTL verification team is trained for using modern high performance and high accuracy verification technologies including mixed-HDL simulation, assertions, coverage reports, testbench automation, IP verification with industry standard languages as SystemVerilog, SystemC or VHDL.

RT-RK is experienced with real-time verification using FPGA. Various platforms can be used and extension for them can be developed in order to create complete verification environment. Additionally, if specific platform is required it can be designed from component selection to final testing in order fulfill all customer requirements.

There are many benefits from using FPGA real-time verification as running long tests and caching corner cases. These platforms also can be used for pre-silicon software development and make time to market much shorter.

 
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