The customer, TTTech Auto, offers a range of testing tools for the automotive industry, mostly targeting the core development in autonomus vehicle applications, vehicle networks and interfaces. The goal of the project was to develop a next generation automotive data logger able to collect and process the complete traffic between ECUs and other devices from different networks within a vehicle without interrupting the communication. Unlike the previous version of the data logger, this device includes additional peripherals in one compact design. This version of data logger is easier to integrate in a test vehicle and has better performance. The data logger is able to sniff comunication from different interfaces such as:

• CAN-FD
• CAN
• FlexRay
• LIN
• 100BASE-T1
• 1000BASE-T1
• 100BASE-TX
• 1000BASE-TX
• A2B
• USB
• Serial
• PCIe
• Camera (LVDS)

The complete logging setup also inculdes an external storage device (SSD) and user interface tool (software running on a PC). The data logger is the core of the system and consists of a data acquisition module, data processing module, power management module and internal storage/memory. The data acquisition module samples raw data from external interfaces. The data processing module processed and stores data from acquisition module, processes and storees recorded video data, stores data to an internal storage or a high capacity external storage, forwards data in real-time over gigabit ethernet interface, configures the acquisition module, etc. The power management module is responsible for powering up/down all system components and monitoring power health in the system. High capacity storage is connected to the data logger device via PCIe interface with throughput of 31 Gb/s.

All protocols on the external interfaces discard the error frames and only record the number of them. If CPU-bound controllers were used then error frames would not be logged. In order to perform an error analysis, such error frames are also needed, from which it follows that an FPGA should be used in this system.

The synthesis was performed using Xilinx Vivado Design Suite and verification using Mentor Graphics Questa Sim. The solution was implemented on Artix-7 FPGA placed on a custom board made by the RT-RK hardware development team.

The overall project consisted of three tasks performed in parallel: production of several custom PCBs with custom housing, design of the digital system in FPGA, and software development. The main challenge in the digital system development was to create a digital design without the possibility of its testing on hardware. For this purpose, a simulation environment was created where the operation of the complete system was emulated. In this way, we avoided mistakes even before implementation of the first prototype.

Conclusion

The project covered the complete development cycle; from hardware design, to digital system architecture planning, to digital system verification, to design implementation on FPGA, to software development. All the development steps were conducted by RT-RK.