Customer
The customer is TTTech Flexibilis Oy, based in Tampere, Finland. The company was founded in 1998. TTTech Flexibilis' main products are field-programmable gate array (FPGA) intellectual property (IP) cores, integrated semiconductor devices, as well as related software and development kits.
Project Overview
The goal of the project was to implement the Flexibilis Redundant Switch into
the CertusPro-NX FPGA device. CertusPro-NX is a low-power, high-performance
FPGA device from Lattice Semiconductor, available in Commercial, Industrial,
and Automotive (AEC-Q100 qualified) temperature grades.
The implementation was performed using Lattice Radiant and Propel software.
The Flexibilis Redundant Switch is a 10 Mbps / 100 Mbps / 1 Gbps Ethernet Layer 2 switch FPGA IP core with Seamless Redundancy support.
A 4-port Flexibilis Redundant Switch application diagram is shown in Figure 1.
Figure 1. 4-port FRS application diagram
The Flexibilis Redundant Switch is compatible with IEC 62439-3 Clauses 4 and
5. Clause 4 defines the Parallel Redundancy Protocol (PRP), while Clause 5
defines the High-availability Seamless Redundancy (HSR) protocol.
The Flexibilis Redundant Switch can be configured to support 3 to 8
triple-speed, full-duplex MII/GMII ports. RMII, RGMII, SGMII, and 1000BASE-X
interfaces are supported via separate adapters.
Each port of the Flexibilis Redundant Switch can be connected to copper or
fiber Ethernet interfaces.
The Flexibilis Redundant Switch is also compatible with the Precision Time
Protocol, defined in IEEE 1588 Version 2 (PTPv2).
The software supporting the Flexibilis Redundant Switch operates on the
Lattice RISC-V RX soft IP core, delivering advanced functionality
critical to the switch’s performance. It facilitates the management of
the FRS using the dedicated FRS Management Protocol, ensuring efficient
control and operation.
Moreover, it incorporates a TCP/IP stack built on the lwIP library, enabling
robust network communication. The stack is carefully designed to support
High-availability Seamless Redundancy (HSR) and peer-to-peer communication of
the Precision Time Protocol Version 2 (PTPv2), ensuring synchronization and
fault tolerance for mission-critical applications.
Typically, the Flexibilis Redundant Switch is connected in a ring topology.
The source node duplicates all outgoing frames and transmits them along two
separate paths to the destination. Even in the event of a path disruption
caused by a link or node failure, the frames can still successfully reach
their destination (Figure 2).
The key advantage of the Flexibilis Redundant Switch compared to the Rapid Spanning Tree Protocol (RSTP) is its zero-time recovery—single network faults in the ring do not result in any frame loss.
Figure 2. Seamless redundancy principle
The main challenges during development were:
- Achieving timing closure within the constraints of the CertusPro-NX architecture
- Optimizing logic and memory resource utilization for Switch IP integration
- Seamlessly integrating the Flexibilis Redundant Switch with the Lattice RISC-V RX soft CPU
- Ensuring deterministic Ethernet performance with support for HSR and PTPv2 using the lwIP TCP/IP stack
- Adapting development workflows to the Lattice Radiant and Propel toolchains to enable efficient FPGA implementation and embedded software development
Conclusion
This project successfully demonstrated the integration of the Flexibilis Redundant Switch (FRS) into the Lattice CertusPro-NX FPGA, delivering a high-availability Ethernet Layer 2 solution with zero-time recovery. By aligning hardware and software components—including a real-time embedded control layer on Lattice’s RISC-V RX core and a TCP/IP stack supporting HSR and PTPv2—we validated the viability of CertusPro-NX for demanding industrial networking applications. The experience further expanded our FPGA design portfolio and solidified our capability to execute complex projects on emerging toolchains and platforms.